ECE 560 Assertion Based Verification
Exploration of practical approaches to functional verification of industrial scale RTL designs using assertions and formal verification tools. Topics include pre-silicon simulation and formal verification, System Verilog Assertions, and system verification problem solving approaches. Course will emphasize hands on experience writing assertions and using formal verification techniques. Familiarity with computer architecture and hardware description languages is recommended.
Prerequisite
Graduate standing in ECE or permission of instructor.