Contents

ENES 246 Digital Logic Design with Lab

This course will introduce the basic principles and design procedures of digital systems at the gate and intermediate chip levels for electrical engineering students. Students will acquire knowledge of gates, flip-flops, registers, counters, Karnaugh maps, FSM, ASM, and paper digital design techniques. The labs start with TTL chip circuit building, move through Verilog HDL test bench event simulators, and end with physically implementing circuits in FPGA chips with vendor software.

Credits

4

Prerequisite

ENES 100 and MATH 153 or higher

Hours Weekly

2 hours lecture, 2 hours recitation, 3 hours lab

Course Objectives

  1. Perform two-level logic minimization using Boolean algebra, Karnaugh maps, and the Quine-McCluskey tabular minimization algorithms on paper.
  2. Incorporate medium scale integrated circuits, like decoders, encoders, multiplexers, etc., into circuit design.
  3. Use various types of latches and flip-flops to design finite state machines.
  4. Describe various types of memory parity and error correction algorithms.
  5. Design algorithmic state machines.
  6. Implement the work flow of design, simulate, test, build, and analyze for at least one of each of the above designs.

Course Objectives

  1. Perform two-level logic minimization using Boolean algebra, Karnaugh maps, and the Quine-McCluskey tabular minimization algorithms on paper.

    Program Goal(s)

    Degree: Computer Engineering - A.S.E. Degree (Transfer)

    1. Apply knowledge of mathematics, science, and technology to identify and solve engineering problems, both individually and in groups.

  2. Incorporate medium scale integrated circuits, like decoders, encoders, multiplexers, etc., into circuit design.

    This objective is a course Goal Only

  3. Use various types of latches and flip-flops to design finite state machines.

    This objective is a course Goal Only

  4. Describe various types of memory parity and error correction algorithms.

    This objective is a course Goal Only

  5. Design algorithmic state machines.

    This objective is a course Goal Only

  6. Implement the work flow of design, simulate, test, build, and analyze for at least one of each of the above designs.

    Program Goal(s)

    Degree: Computer Engineering - A.S.E. Degree (Transfer)

    4. Utilize modern engineering techniques, skills, and tools, with an emphasis on the role that computers play in solving engineering problems.